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Bus Blaster v4

45 €45.00

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Bus Blaster v4 is an experimental, high-speed JTAG debugger from Dangerous Prototypes. Thanks to a reprogrammable buffer, a simple update over USB makes Bus Blaster compatible with many different JTAG debugger types in the most popular open source software. Based on FT2232H with high-speed USB 2.0 Buffered interface works with 3.3volt to 1.8volt targets Reprogrammable buffer is compatible with multiple debugger types Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more ships with JTAGkey compatible buffer image pre-programmed Should support Serial Wire Debug when available Mini-CPLD development board: self programmable, extra CPLD pins to header Open source (CC-BY-SA)   Updates in v4: V4 uses a larger CPLD than previous versions. It can now support the SWV feature of Cortex microcontroller for advance debugging when software support is available SWV is little used and not currently supported in software, most users will be better off with Bus Blaster v3 available here Fitted in a DP9056 (90x56 mm) standard PCB Added series resistors to input and output pins to protect against damage and noise   Each unit is tested before it ships. Bus Blaster Manual Bus Blaster design overview Bus Blaster forum CPLD buffer logic overview   This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   If you encounter any problems when using this product, please request technical support in the forum.
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Description

Bus Blaster v4 is an experimental, high-speed JTAG debugger from Dangerous Prototypes. Thanks to a reprogrammable buffer, a simple update over USB makes Bus Blaster compatible with many different JTAG debugger types in the most popular open source software. Based on FT2232H with high-speed USB 2.0 Buffered interface works with 3.3volt to 1.8volt targets Reprogrammable buffer is compatible with multiple debugger types Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more ships with JTAGkey compatible buffer image pre-programmed Should support Serial Wire Debug when available Mini-CPLD development board: self programmable, extra CPLD pins to header Open source (CC-BY-SA)   Updates in v4: V4 uses a larger CPLD than previous versions. It can now support the SWV feature of Cortex microcontroller for advance debugging when software support is available SWV is little used and not currently supported in software, most users will be better off with Bus Blaster v3 available here Fitted in a DP9056 (90x56 mm) standard PCB Added series resistors to input and output pins to protect against damage and noise   Each unit is tested before it ships. Bus Blaster Manual Bus Blaster design overview Bus Blaster forum CPLD buffer logic overview   This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   If you encounter any problems when using this product, please request technical support in the forum.

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