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USB2.0 Transceiver IC - USB3318

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€3.85

Availability:In stock

Quick Overview

The USB3318 is a high-speed USB 2.0 transceiver (PHY) that supports system architectures based on a 13MHz reference clock. The USB3318 is an extremely flexible chip which allows the USB connector to act as a single port of connection for high speed data transfer, battery charging and stereo/mono audio accessories.

The USB3318 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. The ULPI interface uses a method of in-band signaling and status byte transfers between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte transfers the ULPI interface requires only 12 pins.

The chip includes an integrated 3.3V LDO regulator to generate its own supply from power applied at the VBAT pin. Voltage on the VBAT pin can range from 3.1 to 5.5V.

Features:



  • USB-IF 'High-Speed' compliant to USB 2.0

  • Interface compliant with the ULPI specification

  • 1.8 to 3.3VDC IO Voltage

  • Low current design

  • Full support for On-The-Go (OTG) protocol

  • Supports OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)

  • Allows host to turn VBUS off to conserve battery power in OTG applications

  • Support OTG monitoring of VBUS levels with internal comparators

  • 13MHz Reference Clock Operation

  • Integrated ESD protection circuits

  • Integrated battery to 3.3V LDO regulator


Dimensions: 4 x 4 x 0.90 mm (24-pin QFN package)

Documents:


USB2.0 Transceiver IC - USB3318

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Details

The USB3318 is a high-speed USB 2.0 transceiver (PHY) that supports system architectures based on a 13MHz reference clock. The USB3318 is an extremely flexible chip which allows the USB connector to act as a single port of connection for high speed data transfer, battery charging and stereo/mono audio accessories.

The USB3318 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. The ULPI interface uses a method of in-band signaling and status byte transfers between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte transfers the ULPI interface requires only 12 pins.

The chip includes an integrated 3.3V LDO regulator to generate its own supply from power applied at the VBAT pin. Voltage on the VBAT pin can range from 3.1 to 5.5V.

Features:

  • USB-IF 'High-Speed' compliant to USB 2.0
  • Interface compliant with the ULPI specification
  • 1.8 to 3.3VDC IO Voltage
  • Low current design
  • Full support for On-The-Go (OTG) protocol
  • Supports OTG Host Negotiation Protocol (HNP) and Session Request Protocol (SRP)
  • Allows host to turn VBUS off to conserve battery power in OTG applications
  • Support OTG monitoring of VBUS levels with internal comparators
  • 13MHz Reference Clock Operation
  • Integrated ESD protection circuits
  • Integrated battery to 3.3V LDO regulator

Dimensions: 4 x 4 x 0.90 mm (24-pin QFN package)

Documents:

Additional Information

RoHS Yes

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